(1) Field of the Invention
The present invention relates to a method for fabricating a semiconductor device, and more particularly to a method for forming wirings in a semiconductor device.
(2) Description of the Related Art
With a development of high-integration of MOS ICs; the size of a contact hole and the width of a wiring have been reduced. Therefore, reliability of the wirings, e.g., to ensure that there is no disconnection of an aluminum wiring at different contact levels, is becoming increasingly important.
Now, referring to FIGS. 1A through 1C, an explanation will be given on the method of fabricating wirings according to the prior art.
First, as shown in FIG. 1A, an interlayer insulating film 17 is formed on a semiconductor substrate 1 with a diffused layer 5 being formed therein, and thereafter a contact hole 9 is opened in the interlayer insulating film 17 by a photolithography technique.
Next, as shown in FIG. 1B, an aluminum layer 12 is deposited on the entire surface involving the area of the contact hole 9 of the interlayer insulating film 17 by sputtering.
Finally, as shown in FIG. 1C, the aluminum layer 12 is patterned to provide an aluminum wiring, thus completing a device area.
The technique described above has the following defect. If the integration degree of a MOS IC is increased so that the size of the contact hole is reduced to provide a large aspect ratio, the aluminum wiring tends to be easily broken or disconnected.
In order to obviate such a defect, a technique of embedding a minute contact through selective growth of tungsten (W) has been proposed. This technique will be explained below with reference to FIGS. 2A and 2B.
First, as shown in FIG. 2A, by anisotropic etching, a contact hole 9 is opened within an interlayer insulating film 17 on the diffused layer 5 formed in a semiconductor substrate 1, and thereafter tungsten (W) 10 is embedded in the contact hole 9 by selective growth.
Next, as shown in FIG. 2B, aluminum (A1) is deposited on the interlayer insulating film 17 by sputtering, and the aluminum layer thus formed is patterned to provide an aluminum wiring 12.
This technique makes flat the upper surface of the contact so that the aluminum wiring is prevented from being broken at a level difference portion of the contact.
However, this technique has also the following problem to be solved. Namely, with the method of forming a wiring using this technique, it is not possible to embed contacts in contact holes with different depths simultaneously and satisfactorily. The reason for this will be described below.
Now, it is assumed that, as shown in FIG. 3A, a field insulating film 2, a gate insulating film 3 and a diffused layer 5 are formed on a semiconductor substrate 1. A polysilicon (also called polycrystalline silicon) layer 4 is formed on the field insulating film 2, and the polysilicon layer 4 is covered with an interlayer insulating film 17 with its surface being made flat. Further, contact holes 9 with different depths reaching the polysilicon layer 4 and the diffused layer 5, respectively, are opened in the interlayer insulating film 17.
Here, if tungsten (W) 10 is selectively grown, it will be sufficiently embedded into the contact hole on the polysilicon layer 4, whereas it will not be embedded even half-way into the contact hole on the diffused layer 5.
Further, if an aluminum wiring 12 is formed, as shown in FIG. 3B, it will stop above the tungsten 10 on the diffused layer 5.
In order to prevent the aluminum wiring from being broken, the contact holes must be formed partially by isotropic etching. However, if the isotropic etching is restrained so that the contact hole is not enlarged at the shallow portion of the contact step, a high vertical step will be left at the deep portion of the contact step. Tungsten cannot then be sufficiently embedded into the contact hole with the high vertical step. This leads to poor coverage of the aluminum wiring. For example, assuming that the thickness of the interlayer insulating film on the polysilicon 4 is 0.6 .mu.m and that on the diffused layer 5 is 1.6 .mu.m, if the isotropic etching is restrained so that the contact hole is not enlarged at the shallow portion of the contact step, the contact hole thus formed is about 0.6 .mu.m in depth, so that a vertical step of about 1.0 .mu.m in thickness will be left on the diffused layer 5. Although 0.6 .mu.m of 1.0 .mu.m can be embedded with tungsten (W), a vertical step of about 0.4 .mu.m in depth will be still left. If the size (diameter) of the contact hole 9 is 0.6-0.8 .mu.m, the aspect ratio thereof is approximately equal to one (1). If the aluminum wiring of 0.5 .mu.m in thickness is formed on the contacts thus formed, it is estimated that this results in a 10% or less step coverage.
As understood from the above description about the prior art, it is difficult to make the aluminum wiring with a satisfactory step coverage on the contacts with different depths by the method for making an aluminum wiring according to the prior art.